1. Field of the Invention
The invention is directed to the encoding, transmission and decoding of digital data that are, grouped into data segments of variable length.
2. Description of the Prior Art
In what is referred to as packet-oriented data transmission, the data transmitted as digital data are grouped into data segments that comprise a permanent prescribed or a variable segment length. The data segments are channel-encoded and transmitted.
Digital data are, for example, digital video data, digital audio data or digital text information such as in the ASCII format.
When variable segment lengths are allowed for the data segments, a problem arises for the receiving station of synchronizing correctly to the received sequential bit stream in view of the data segments (i.e., to respectively correctly find the start of a data segment). This job is usually carried out by a multiplexer.
The multiplex protocol ITU-H.223 of the picture telephony standard ITUH-H.324 is described in ITU-H.223, International Telecommunications Union, Multiplex Protocol for Low Bit Rate Multimedia Communication, 1996. Variable segment lengths are employed in the multiplex protocol ITU-H.223. The individual data segments are separated from one another by what is referred to as a synchronization word or HDLC Flags, (High Level Data Link Control Flags). The HDLC flag is composed of the bit sequence xe2x80x9c0111 1110xe2x80x9d. In order to prevent an incorrect classification (emulation) of an identical bit sequence occurring in the data segment as synchronization word, each data segment is investigated for the bit sequence xe2x80x9c11111xe2x80x9d (five successive bits having the value xe2x80x9c1xe2x80x9d) in the encoding. When such a bit sequence is found, then one bit having the value xe2x80x9c0xe2x80x9d is automatically inserted. This procedure is referred to as bit stuffing.
This method exhibits poor properties given a faulty transmission channel, for example in the radio transmission according to the GSM method or the DECT method. As a result of the faulty transmission channel, the synchronization word is often not found when an error occurs in the synchronization word during the, transmission. A transmission error in the data segment can also lead to emulation of the synchronization word, this leading to an incorrect synchronization at the receiver of the transmitted data segment.
EP-A-0 690 630 discloses a method and an arrangement for the transmission of digital data. Given the method disclosed in EP-A-0 699 630, digital data are encoded according to a xe2x80x9cserial digital data interface (SDDI) format, are transmitted and decoded. An apparatus correspondingly matched to the SDDI format is employed for the encoding, transmission and decoding.
EP-A-0 666 652 discloses a method for decoding a digital signal with variable length. Given the procedure disclosed by EP-A-0 666 652, the length of a received digital signal is respectively processed such before the actual decoding of received digital signals that the processed digital signal comprises a predetermined maximum length.
The invention is thus based on the problem of specifying methods and devices with which a dependable synchronization to the data segments is achieved.
According to a method of the present invention, the digital data are grouped into at least one data segment. The data segment is encoded, wherein a length of the data segment is entered into check information of the data segment during the encoding.
In addition the data segment, which contains check information having a particular length of the data segment, is decoded dependent on the particular length of the data segment.
In a further embodiment the data segments, which contain check information having a particular length of the data segment, are decoded dependent on the particular length of at least one other data segment.
An apparatus of the present invention for decoding digital data comprises a processor unit that is configured to decode the received data segment dependent on the particular length of the data segment encoded into the data segment and also the synchronization information.
The apparatus of the present invention can be comprised of a computer, having a programmable microprocessor as the processor unit. The encoding and decoding of the digitized images in the present invention ensues upon employment of a computer program that is programmed such that the corresponding method steps are implemented by the computer.
The apparatus can also be specific hardware modules, such as a specific computer card for encoding or, decoding example.
It will be appreciated by those skilled in the art that the present invention utilizing a particular length of the respective data segment contained in the check information of the data segment results in a reliable synchronization and, thus improved resistance to errors.
The resistance to errors is further improved in a an embodiment of the invention in that a synchronization word is also employed in addition to the particular segment length and the technique of bit stuffing may also be employed.
For further enhancing the resistance to error, it is also advantageous in an embodiment to secure the specification of the segment length and/or a specification about the type of data contained in the data segment with error recognition information and/or error correction information.
Additional advantages and novel features of the invention will be set forth in part in the description which follows and, in part, will become apparent to those skilled in the art upon examination of the following, or may be learned by practice of the invention. The Advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed-out in the attended claims.